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Theory of Operation 4-19
8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance.
Independent 32-bit write buffers allow fast-posted writes to improve system-bus
utilization.
An advanced CMOS process is used to achieve low system-power consumption while
operating at PCI clock rates up to 33 MHz. Several low-power modes allow the host
power-management system to further reduce power consumption.
4.2.10.1 PCI 1130 Features
♦
3.3V core logic with universal PCI interface compatible with 3.3V or 5V PCI
signaling environments
♦ Supports PCI Local Bus specification 2.1
♦ Mix and match 3.3V/5V PC card 16 cards and 3.3V CardBus cards
♦ Supports two PC card or CardBus slots with hot insertion and removal
♦ 1995 PC Card standard compliant
♦ Low-Power advanced submicron CMOS technology
♦ Uses serial interface to Texas Instruments (TI) tps2202a dual power switch
♦ System interrupts can be programmed as PCI-Style or ISA IRQ-Style interrupts
♦ ISA IRQ interrupts can be serialized onto a single IRQSER pin
♦ Independent read and write buffers for each direction
♦ Supports burst transfers to maximize data throughput on the PCI and CardBus
bus
♦ Multifunction PCI device with separate five PCI Memory Windows and two I/O
Windows available to each PC Card 16 socket
♦ Two l/O Windows and two memory windows available to each CardBus socket
♦ CardBus Memory Windows can be individually selected prefetchable or non-
PREFETCHABLE
♦ ExchangeableCard (ExCAT)-compatible registers are mapped in memory and
I/O space
♦ TI extension registers are mapped in the PCI configuration space
♦ Intel 82365SL DF register compatible
♦ Supports 16-bit distributed Direct Memory Access (DMA) on both PC Card
sockets