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2.7.2CommandStarvation
PeripheralArchitecture
Next,theDDR2memorycontrollerexamineseachofthecommandsselectedbytheindividualmasters
andperformsthefollowingreordering:
•Amongallpendingreads,selectsreadstorowsalreadyopen.Amongallpendingwrites,selectswrites
torowsalreadyopen.
•Selectsthehighestprioritycommandfrompendingreadsandwritestoopenrows.Ifmultiple
commandshavethehighestpriority,thentheDDR2memorycontrollerselectstheoldestcommand.
TheDDR2memorycontrollermaynowhaveafinalreadandwritecommand.IftheReadFIFOisnotfull,
thenthereadcommandwillbeperformedbeforethewritecommand,otherwisethewritecommandwillbe
performedfirst.
Besidescommandsreceivedfromon-chipresources,theDDR2memorycontrolleralsoissuesrefresh
commands.TheDDR2memorycontrollerattemptstodelayrefreshcommandsaslongaspossibleto
maximizeperformancewhilemeetingtheSDRAMrefreshrequirements.AstheDDR2memorycontroller
issuesread,write,andrefreshcommandstoDDR2SDRAMdevice,itfollowsthefollowingpriority
scheme:
1.(Highest)RefreshrequestresultingfromtheRefreshMustlevelofurgency(seeSection2.8)being
reached
2.Readrequestwithoutahigherprioritywrite(selectedfromabovereorderingalgorithm)
3.RefreshrequestresultingfromtheRefreshNeedlevelofurgency(seeSection2.8)beingreached
4.Writerequest(selectedfromabovereorderingalgorithm)
5.RefreshrequestresultingfromRefreshMaylevelofurgency(seeSection2.8)beingreached
6.(Lowest)Requesttoenterself-refreshmode
Thefollowingresultsfromtheaboveschedulingalgorithm:
•Allwritesfromasinglemasterwillcompleteinorder
•Allreadsfromasinglemasterwillcompleteinorder
•Fromthesamemaster,anyreadtothesamelocation(orwithin2048bytes)asapreviouswritewill
completeinorder
Thereorderingandschedulingruleslistedabovemayleadtocommandstarvation,whichisthe
preventionofcertaincommandsfrombeingprocessedbytheDDR2memorycontroller.Command
starvationresultsfromthefollowingconditions:
•Acontinuousstreamofhigh-priorityreadcommandscanblockalow-prioritywritecommand
•AcontinuousstreamofDDR2SDRAMcommandstoarowinanopenbankcanblockcommandsto
theclosedrowinthesamebank.
Toavoidtheseconditions,theDDR2memorycontrollercanmomentarilyraisethepriorityoftheoldest
commandinthecommandFIFOafterasetnumberoftransfershavebeenmade.ThePRIO_RAISEfield
intheBurstPriorityRegister(BPRIO)setsthenumberofthetransfersthatmustbemadebeforethe
DDR2memorycontrollerwillraisethepriorityoftheoldestcommand.
Note:LeavingthePRIO_RAISEbitsattheirdefaultvalue(FFh)disablesthisfeatureoftheDDR2
memorycontroller.ThismeanscommandscanstayinthecommandFIFOindefinitely.
Therefore,thesebitsshouldbesettoFEhimmediatelyfollowingresettoenablethisfeature
withthehighestlevelofallowablememorytransfers.Itissuggestedthatsystem-level
prioritizationbesettoavoidplacinghigh-bandwidthmastersonthehighestprioritylevels.
ThesebitscanbeleftasFEhunlessadvancedbandwidth/prioritizationcontrolisrequired.
DSPDDR2MemoryController 24SPRUEK5A–October2007
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