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DDR2MemoryControllerRegisters
Table22.SDRAMTiming1Register(SDTIM1)FieldDescriptions(continued)
BitFieldValueDescription
1-0T_WTRThesebitsspecifytheminimumnumberofDDR_CLKcyclesfromthelastwritetoaread
command,minus1.Thevalueforthesebitscanbederivedfromthet
wtr
ACtimingparameterinthe
DDR2memorydatasheet.Calculateusingthisformula:
T_WTR=(t
wtr
/DDR_CLK)-1
42DSPDDR2MemoryControllerSPRUEK5A–October2007
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