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8–5
ZyXEL-specific Registers
S12 Reserved.
S13 Bit-mapped register; default: 0:
S14 Bit-mapped register; default: 2:
S15 Bit-mapped register; default: 130:
Code
Bits Bin. Dec. Description
(1) 0 0 Doesn't capture modem manufacturer info.
(Default)
1 2 Captures modem manufacturer information
during V.42 handshake. Will be displayed in
ATI2 Last Speed/Protocol line if available.
Code
Bits Bin. Dec. Description
&M0 (7,6) 00 0 Async, buffered. (Default)
&M1 01 64 Async command, sync data.
&M2 10 128 Async direct, unbuffered.
&M3 11 192 Sync.
&X0 (5,4) 00 0 Internal clock. (Default)
&X1 01 16 External clock (from DTE).
&X2 10 32 Remote clock (Slave).
&L0 (3,2) 00 0 Dial-up line. (Default)
&L1 01 4 2W leased line.
&L2 10 8 4W leased line.
&T4 (1) 0 0 Grants remote digital loopback test request.
&T5 1 2 Denies remote digital loopback test request.
(Default)
*M0 (0) 0 0 Originate mode auto-handshake in leased-
line operation. (Default)
*M1 1 1 Answer mode auto-handshake in leased-line
operation.
Code
Bits Bin. Dec. Description
Z0 (7,6,5) 000 0 Profile 0 as active settings; also active after
the next power turn-on.