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4 VIP-4R/4T Installation and Configuration
Versatile Interface Processor Functions
Note The VIP port adapters themselves do not support OIR, nor are they FRUs.
The VIP uses a Reduced Instructions Set Computing (RISC), Mips 4600 processor for high
performance, and has an internal operating frequency of 100 megahertz (MHz) and a 50-MHz
system bus interface. The VIP has 8 megabytes (MB) of dynamic random access memory (DRAM)
as the default DRAM configuration.
Figure 1 shows a VIP-4R/4T. The VIP firmware (microcode), which contains card-specific software
instructions, resides in a Flash memory device in socket location U17. Single in-line memory
modules contain the DRAM. For connector pinouts, refer to the section “4R Port Adapter
Receptacles, Cables, and Pinouts” on page 34, or to the section “4T Port Adapter Receptacles,
Cables, and Pinouts” on page 51. You can install VIPs in any available interface processor slots.
Figure 1 VIP with One 4R and One 4T Port Adapter (Horizontal Orientation Shown)
Note In the Cisco 7000, Cisco 7507 and Cisco 7513 chassis, the VIP is installed vertically. In the
Cisco 7010 and Cisco 7505 chassis, the VIP is installed horizontally. Port adapters have a handle
attached, but this handle is not shown to allow a full view of detail on each port adapter’s faceplate.
H5985
DRAM
SIMMs
Microcode
ROM U1 7
Bus connector
EN
TD
TC
RD
RC
LB
CD
FAST SERIAL
EN
TD
TC
RD
RC
LB
CD
TD
TC
RD
RC
LB
CD
TD
TC
RD
RC
LB
CD
TD
TC
RD
RC
LB
CD
4R in port
adapter
slot 0
4T in port
adapter
slot 1
Port adapter
handles not shown