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STL2 Server Board TPS STL2 Server Board Architecture Overview
Revision 1.0 2-5
2. STL2 Server Board Architecture Overview
The architecture of the STL2 server board is based on a design that supports dual-processor
operation with Intel Pentium III processors and the ServerWorks ServerSet III LE chipset.
The STL2 server contains embedded devices for video, NIC, SCSI, and IDE. The STL2 server
board also provides support for server management and monitoring hardware, and interrupt
control that supports dual-processor and PC/AT compatible operation.
The section provides an overview of the following STL2 subsystems:
•
Pentium III processor subsystem
•
SeverWorks ServerSet III LE chipset
•
Memory
•
PCI Subsystem
•
Chipset Support Components
•
BMC server management controller
2.1 Intel® Pentium® III Processor Subsystem
The STL2 server board is designed to accommodate one or two Intel Pentium III processors for
the PGA370 socket. The Pentium III processor for the PGA370 socket is the next member of
the P6 family in the Intel IA-32 processor line. This processor uses the same core and offers
the same performance as the Intel Pentium III processor for the SC242 connector, but utilizes
a new package technology called flip chip pin grid array, or FC-PGA. This package utilizes the
same 370-pin zero-insertion force socket (PGA370) used by the Intel® Celeron™ processor.
The STL2 server board utilizes Pentium III PGA370 socket processors, which interface with the
front side bus at 133 MHz.
2.1.1 Supported Processor Types
The table below summarizes the processors that are planned to be supported on the STL2
server board:
Table 2-1. STL2 Server Board Supported Processors
Speed FSB Frequency Cache Size Core
1 GHz 133 MHz 256K CuMine
933 MHz 133 MHz 256K CuMine
866 MHz 133 MHz 256K CuMine
800 MHz 133 MHz 256K CuMine
733 MHz 133 MHz 256K CuMine
667 MHz 133 MHz 256K CuMine