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50QMA
50QMA
N/B Maintenance
N/B Maintenance
• Support 2 PWM channels, 2 D-A and 8 A-D converters
• Reduce Firmware burden by Hardware PS/2 decoding
• Support 72 useful GPIOs totally
• Support Flash utility for on board re-flash
• Support ACPI
• Hardware fast Gate A20 with software programmable
IDE HDD
1.2.13 Hard Disk Drive
The ICH6 IDE controller features one set of interface signals that can be enabled, tri-stated or driven low. The IDE
interfaces of the ICH6 can support several types of data transfers:
• Programmed I/O (PIO): processor is in control of the data transfer
• 8237 style DMA: DMA protocol that resembles the DMA on the ISA bus, although it does not use the 8237 in
the ICH6. This protocol off loads the processor from moving data. This allows higher transfer rate of up to
16MB/s
MiTac Secret
Confidential Document