Filter
Top Products
Operating Basics
Option 01 VXI Interface Module User Manual
2–3
The module also supports the Fast Handshake Mode during readback. In this
mode, the module is capable of transferring data at optimal backplane speed
without needing the commander to test any of the handshake bits. The Option 01
daughter board asserts BERR* to switch from Fast Handshake Mode to Normal
Transfer Mode, per VXI Specification. The Option 01 Read Ready, Write Ready,
DIR and DOR bits react properly, in case the commander does not support the
Fast Handshake Mode.
A Fast Handshake Transfer Mode read of the Option 01 daughter board proceeds
as follows:
1. The commander writes the Byte Request command (hexadecimal 0DEFF) to
the Option 01 Data Low register.
2. The commander reads the Option 01 Data Low register.
A Fast Handshake Transfer Mode write of the Option 01 daughter board
proceeds as follows:
The commander writes the Byte Available command which contains the data
(hexadecimal 0BCXX or 0BDXX, depending on the End bit) to the Data
Low register of the Option 01. The commander may immediately write
another Byte Available command without having to check the Response
register.
The module has no registers beyond those defined for VXIbus message based
devices. All communications with the module are through the Data Low register,
the Response register, or the VXIbus interrupt cycle. Any attempt by another
module to read or write to any undefined location of the Option 01’s address
space may cause incorrect operation of the module.
As with all VXIbus devices, the Option 01 daughter board has registers located
within a 64 byte block in the A16 address space. The base address of the Option
01 device registers is determined by the device unique logical address and can be
calculated as follows:
Base Address = V
16
* 40
16
+ C000
16
where V is the logical address of the device as set by the Logical Address
switches.