Xilinx ML605 Computer Hardware User Manual


 
ML605 Hardware User Guide www.xilinx.com 13
UG534 (v1.2.1) January 21, 2010
Detailed Description
1. Virtex-6 XC6VLX240T-1FFG1156 FPGA
A Virtex-6 XC6VLX240T-1FFG1156 FPGA is installed on the embedded development
board.
Keep-Out areas and drill holes are defined around the FPGA to support an Ironwood
Electronics SG-BGA-6046 FPGA socket.
References
See the Virtex-6 FPGA Data Sheet. [Ref 4]
Configuration
The ML605 supports configuration in the following modes:
Slave SelectMAP (using Platform Flash XL with the onboard 47 MHz oscillator)
Master BPI-Up (using Linear BPI Flash device)
JTAG (using the included USB-A to Mini-B cable)
JTAG (using System ACE CF and CompactFlash card)
18
Switches 13, 25, 39
a. Power On/Off Slide switch 39
b. FPGA_PROG_B
pushbutton
active-Low 13
c. System ACE CF Image
Select
4-pole DIP switch (active-High) 25
d. Mode Switch 6-pole DIP switch (active-High) 25
19 FMC - HPC connector Samtec ASP-134486-01 16 -19
20 FMC - LPC connector Samtec ASP-134603-01 20
21
Power management 35 - 44
a. PMBus controllers 2 x TI UCD9240PFC 35, 40
b. Voltage regulators
2 x PTD08A020W, 3 x PTD08A010W
36-38, 43,
44
c. 12V power input
connector
6-pin Molex mini-fit connector 39
d. 12V power input
connector
4-pin ATX disk type connector 39
22
System Monitor Interface
connector
2x6 DIP male pin header 34
23
System ACE Error DS30 LED
disable jumper J69
Jumper on = enable LED
Jumper off = disable LED
13
Table 1-1: ML605 Features (Cont’d)
Number Feature Notes
Schematic
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