Filter
Top Products
ML605 Hardware User Guide www.xilinx.com 73
UG534 (v1.2.1) January 21, 2010
Configuration Options
Configuration Options
The FPGA on the ML605 Evaluation Board can be configured by the following methods:
• “3. 128 Mb Platform Flash XL,” page 20
• “4. 32 MB Linear BPI Flash,” page 20
• “5. System ACE CF and CompactFlash Connector”
• “6. USB JTAG,” page 26
For more information, see the Virtex-6 FPGA Configuration User Guide at
http://www.xilinx.com/support/documentation/user_guides/ug360.pdf
.
With the mode set to JTAG 101, the ML605 will not attempt to boot or load a bitstream
from either of the Flash devices. If a CompactFlash (CF) card is installed in the CF socket
U73, System ACE CF will attempt to load a bitstream from the CF card image address
pointed to by the image select switch S1. With no CF card present, the ML605 can be
configured via the onboard JTAG controller and USB download cable as described above.
With the mode set to either Slave SelectMAP 110, or BPI Mode 010, the FPGA will attempt
to configure itself from the selected Flash device as described in “3. 128 Mb Platform Flash
XL,” page 20.
Note:
S1 switch 4 is the System ACE controller enable switch. When ON, this switch allows the
System ACE to boot at power-on if it finds a CF card present. In order to boot from BPI Flash U4 or
Xilinx Platform Flash (U27) without System ACE contention, S1 switch 4 must be OFF.
Table 1-32: Mode Switch S2 Settings
Mode Pins (M2,M1,M0) Configuration Mode
110 Slave SelectMAP
010 BPI Mode
101 JTAG