Acer G610 Server User Manual


 
1 System overview
4
Memory
The four DIMM sockets on board allow memory upgrade to a
maximum of 4 GB using four 1024-MB registered SDRAM (Synchronous
DRAM) DIMMs. For data integrity, the default setting of the ECC (error-
correcting code) function of the memory system in BIOS is enabled.
Note: The SDRAM should work under 3.3 volts only; 5-volt
memory devices are not supported.
The system board supports both 100 and 133 MHz registered SDRAMs
only; 66 MHz SDRAMs are not supported.
System chipsets
Server Works LE north and south bridge
The Server Works CNB30LE (champ north bridge) chipset incorporated
as the north bridge is in charge of the host bus interfacing and memory
bus control. The north bridge provides one 32-bit PCI bus running at 33
MHz and another secondary PCI bus running at 33/66 MHz.
The OSB4 (open south bridge) subset provides the legacy ISA interface,
USB port, ATA33, and SM bus. The BMC (Baseboard Management
Control) was embedded on the motherboard and connected with the
south bridge to provide the ASM and RDM functions and the industry
standard IPMI protocol as well.
SCSI subsystem
The dual-channel AIC-7899 single-chip host adapter delivers Ultra160
SCSI data transfer rates which doubles the Ultra-2 SCSI data transfer
rate of up to 160 MByte/sec. With two channels, it delivers a total of
320 MByte/sec bandwidth. In addition, the AIC-7899 features a 66 MHz,
64-bit PCI interface that supports zero wait-state memory which also
operates on 33 MHz, 32-bit PCI buses. It supports up to 15 devices on a
12-meter cable (or 25 meters in a point-to-point configuration),
making it ideal for clustering and RAID configurations.
AA G600.book Page 4 Thursday, August 23, 2001 2:31 PM