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CY7C67300
Document #: 38-08015 Rev. *J Page 70 of 99
CRC Enable (Bit 13)
The CRC Enable bit enables or disables the CRC operation.
1: Enables CRC operation
0: Disables CRC operation
CRC Clear (Bit 12)
The CRC Clear bit clears the CRC with a load of all ones. This
bit is self clearing and always reads ‘0’.
1: Clear CRC with all ones
0: No Function
Receive CRC (Bit 11)
The Receive CRC bit determines whether the receive bit stream
or the transmit bit stream is used for the CRC data input in full
duplex mode. This bit is a don’t care in half duplex mode.
1: Assigns the receive bit stream
0: Assigns the transmit bit stream
One in CRC (Bit 10)
The One in CRC bit is a read only bit that indicates if the CRC
value is all zeros or not
1: CRC value is not all zeros
0: CRC value is all zeros
Zero in CRC (Bit 9)
The Zero in CRC bit is a read only bit that indicates if the CRC
value is all ones or not.
1: CRC value is not all ones
0: CRC value is all ones
Reserved
Write all reserved bits with ’0’.
SPI CRC Value Register [0xC0D4] [R/W]
Register Description
The SPI CRC Value register contains the CRC value.
CRC (Bits [15:0])
The CRC field contains the SPI CRC. In CRC Mode CRC7, the
CRC value is a seven bit value [6:0]. Therefore, bits [15:7] are
invalid in CRC7 mode.
Table 112. CRC Mode Definition
CRCMode
[15:14]
CRC Polynomial
00 MMC 16 bit: X^16 + X^12 + X^5 + 1(CCITT
Standard)
01 CRC7 7 bit: X^7+ X^3 + 1
10 MST 16 bit: X^16+ X^15 + X^2 + 1
11 Reserved, 16 bit polynomial 1
Table 113. SPI CRC Value Register
Bit # 15 14 13 12 11 10 9 8
Field CRC...
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Default 1 1 1 1 1 1 1 1
Bit # 7 6 5 4 3 2 1 0
Field ...CRC
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Default 1 1 1 1 1 1 1 1
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