Cypress CY7C67300 Computer Hardware User Manual


 
CY7C67300
Document #: 38-08015 Rev. *J Page 85 of 99
AC Timing Characteristics
Reset Timing
Clock Timing
Notes
11. Clock is 12 MHz nominal.
12.
v
XINH
is required to be 3.0 V to obtain an internal 50/50 duty cycle clock.
Table 135. Reset Timing Parameters
Parameter Description Min Typical Max Unit
t
RESET
nRESET Pulse Width 16 clocks
[11]
t
IOACT
nRESET HIGH to nRD or nWRx active 200 µs
nRESET
nRD or nWRL or nWRH
t
RESET
t
IOACT
Reset Timing
Table 136. Clock Timing Parameters
Parameter Description Min Typical Max Unit
f
CLK
Clock Frequency 12.0 MHz
v
XINH
[12]
Clock Input High
(XTALOUT left floating)
1.5 3.0 3.6 V
t
CLK
Clock Period 83.17 83.33 83.5 ns
t
HIGH
Clock High Time 36 44 ns
t
LOW
Clock Low Time 36 44 ns
t
RISE
Clock Rise Time 5.0 ns
t
FALL
Clock Fall Time 5.0 ns
Duty Cycle 45 55 %
XTALIN
Clock Timing
t
RISE
t
FALLt
HIGH
t
CLK
t
LOW
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