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CY7C67300
Document #: 38-08015 Rev. *J Page 90 of 99
HPI (Host Port Interface) Read Cycle Timing
Table 141. HPI Read Cycle Timing Parameters
Parameter Description Min Typical Max Unit
t
ASU
Address Setup –1 ns
t
AH
Address Hold –1 ns
t
CSSU
Chip Select Setup –1 ns
t
CSH
Chip Select Hold –1 ns
t
ACC
Data Access Time, from HPI_nRD falling 1 T
[18]
t
RDH
Read Data Hold, relative to the earlier of
HPI_nRD rising or HPI_nCS rising
1.5 7 ns
t
RP
Read Pulse Width 2 T
[18]
t
CYC
Read Cycle Time 6 T
[18]
t
ASU
t
RP
t
AH
t
CSSU
t
CSH
t
CYC
t
RDH
t
ACC
t
RDH
nCS
nRD
nWR
ADDR [1:0]
Din [15:0]
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