Fujitsu F2MC-8FX Computer Hardware User Manual


 
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CHAPTER 4 INTERRUPT PROCESSING
4.3 Creating an Interrupt Processing Program
In the F
2
MC-8FX series, basically, interrupt requests from resources are issued by
hardware and cleared by software.
Creating an Interrupt Processing Program
The interrupt processing control flow is as follows:
1. Initialize resources before operation.
2. Wait until an interrupt occurs.
3. In the event of an interrupt, if the interrupt can be accepted, perform interrupt processing to branch to
the interrupt processing routine.
4. First, set software so as to clear the interrupt source at the beginning of the interrupt processing routine.
This is done so that the resource causing an interrupt can regenerate the interrupt during the interrupt
processing program.
5. Next, perform interrupt processing to transfer the necessary data.
6. Use the interrupt release instruction to release the interrupt from interrupt processing.
7. Then, continue to execute the main program until an interrupt recurs. The typical interrupt processing
flow is shown in Figure 4.3-1.
The numbers in the figure correspond to the numbers above.
Figure 4.3-1 Interrupt Processing Flow
The time to transfer control to the interrupt processing routine after the occurrence of an interrupt 3 in
Figure 4.3-1) is 9 instruction cycles. An interrupt can only be processed in the last cycle of each instruction.
The time shown in Figure 4.3-2 is required to transfer control to the interrupt processing routine after an
interrupt occurs.
The longest cycle (17 + 9 = 26 instruction cycles) is required when an interrupt request is issued
immediately after starting the execution of the DIVU instruction.
Set the interrupt request from
the resource in ha rdware and
issue an interrupt request.
Main program
Initialize the
resource.
Set he interrupt level
to the IL bit.
Interrupt processing program
Clear the interrupt source: To accept a multiple interrupts
from the same resource.
Interrupt processing program: Transfer the actual
processing data.
Release the interrupt from the interrupt processing.
Prevent multiple
interrupts of the
same level.