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CHAPTER 4 INTERRUPT PROCESSING
Figure 4.3-2 Interrupt Response Time
CPU operation
Interrupt
handling
Normal
instruction execution
Interrupt processing program
Interrupt wait time
Sample wait (a)
Interrupt request issued
9 instruction
cycles (b)
Indicates the last instruction cycle
in which an interrupt is sampled.
Note: It will take (a) + (b) instruction cycles to transfer control to
the interrupt processing routine after an interrupt occurs.