Fujitsu F2MC-8FX Computer Hardware User Manual


 
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CHAPTER 6 DETAILED RULES FOR EXECUTION INSTRUCTIONS
6.11 BLT (Branch Less Than zero: relative if < Zero)
Execute the next instruction if the logical exclusive-OR for the V and N flags is 0 and the
branch if it is 1. Branch address corresponds to the value of addition between the PC
value (word value) of the next instruction and the value with rel code-extended (word
value).
BLT (Branch Less Than zero: relative if < Zero)
Operation
(V) (N) = 0: (PC) (PC) + 2 (Word addition)
(V) (N) = 1: (PC) (PC) + 2 + rel (Word addition)
Assembler format
BLT rel
Condition code (CCR)
+: Changed by executing instruction
-: Not changed
N: Not changed
Z: Not changed
V: Not changed
C: Not changed
Number of execution cycles: 4 (at divergence)/ 2 (at non-divergence)
Byte count: 2
OP code: FF
NZVC
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