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The eServer 326 supports a four-level page table. The uppermost level is kept private to the architecture-
specific code of SLES. The page-table setup supports up to 48 bits of address space. The x86-64 architecture
supports page sizes of 4 KB and 2 MB.
Figure 5-61 illustrates how paging is used to translate a 64-bit virtual address into a physical address for the 4
KB page size.
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Figure 5-60: Contiguous linear addresses map to contiguous physical addresses