Filter
Top Products
Development Kit Manual 3
Document Number: 250807
Revision Number: 003
Revision Date: June 27, 2003
Contents
Contents
1.0 Introduction.........................................................................................................................7
1.1 About This Kit.....................................................................................................................7
1.2 Additional Equipment Required..........................................................................................7
1.3 About This Demo Board .....................................................................................................8
1.3.1 Features.................................................................................................................8
1.3.2 Component Location and Description ..................................................................9
2.0 Quick Start........................................................................................................................11
2.1 Setup..................................................................................................................................11
3.0 Typical Test Setup............................................................................................................12
4.0 CPU Daughter Card .........................................................................................................13
4.1 CPU FPGA........................................................................................................................14
4.2 IXF1110 Register Modifications on Startup .....................................................................14
5.0 IXF1110 Software.............................................................................................................15
5.1 PC Requirements...............................................................................................................15
5.2 Installing the IXF1110 Software.......................................................................................16
5.3 Changing the IP Address of the CPU Daughter Card (Optional)......................................16
6.0 Optional Configurations....................................................................................................18
6.1 Reset Jumper JP2...............................................................................................................18
6.1.1 Standard Operation .............................................................................................18
6.2 JTAG Test Signals.............................................................................................................18
7.0 LEDs.................................................................................................................................19
8.0 Test Points .......................................................................................................................20
8.1 Reset Test Points ...............................................................................................................20
8.2 IXF1110 Input Clock Test Points......................................................................................20
8.3 GBIC Test Points...............................................................................................................20
8.4 Mictor Connectors.............................................................................................................21
8.5 Power and Ground Test Points..........................................................................................22
8.6 Unused Test Points............................................................................................................24
9.0 Board Schematics ............................................................................................................25
10.0 Bill of Materials.................................................................................................................38