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Appendix C: POST Code Diagnostic LEDs Intel
®
Server Board S5000PAL / S5000XAL TPS
Revision 1.4
Intel order number: D31979-007
102
Table 46. Diagnostic LED POST Code Decoder
Diagnostic LED Decoder
G=Green, R=Red, A=Amber
Checkpoint
MSB LSB
Description
Host Processor
0x10h OFF OFF OFF R Power-on initialization of the host processor (bootstrap processor)
0x11h OFF OFF OFF A Host processor cache initialization (including AP)
0x12h OFF OFF G R Starting application processor initialization
0x13h OFF OFF G A SMM initialization
Chipset
0x21h OFF OFF R G Initializing a chipset component
Memory
0x22h OFF OFF A OFF Reading configuration data from memory (SPD on DIMM)
0x23h OFF OFF A G Detecting presence of memory
0x24h OFF G R OFF Programming timing parameters in the memory controller
0x25h OFF G R G Configuring memory parameters in the memory controller
0x26h OFF G A OFF Optimizing memory controller settings
0x27h OFF G A G Initializing memory, such as ECC init
0x28h G OFF R OFF Testing memory
PCI Bus
0x50h OFF R OFF R Enumerating PCI busses
0x51h OFF R OFF A Allocating resources to PCI busses
0x52h OFF R G R Hot Plug PCI controller initialization
0x53h OFF R G A Reserved for PCI bus
0x54h OFF A OFF R Reserved for PCI bus
0x55h OFF A OFF A Reserved for PCI bus
0x56h OFF A G R Reserved for PCI bus
0x57h OFF A G A Reserved for PCI bus
USB
0x58h G R OFF R Resetting USB bus
0x59h G R OFF A Reserved for USB devices
ATA / ATAPI / SATA
0x5Ah G R G R Resetting PATA / SATA bus and all devices
0x5Bh G R G A Reserved for ATA
SMBUS
0x5Ch G A OFF R Resetting SMBUS
0x5Dh G A OFF A Reserved for SMBUS
Local Console
0x70h OFF R R R Resetting the video controller (VGA)
0x71h OFF R R A Disabling the video controller (VGA)
0x72h OFF R A R Enabling the video controller (VGA)
Remote Console
0x78h G R R R Resetting the console controller
0x79h G R R A Disabling the console controller
0x7Ah G R A R Enabling the console controller
Keyboard (PS2 or USB)
0x90h R OFF OFF R Resetting the keyboard
0x91h R OFF OFF A Disabling the keyboard