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16-Bit Timer Setup Examples
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
106
Panasonic
4.11.4 Setting Up a Single-Phase Capture Input Using Timer 4
In this example, timer 4 is used to divide B
OSC
/4 by 65,536 and measure how
long the TM4IA input signal stays high. An interrupt occurs on capture B and the
software calculates the number of cycles by subtracting the contents of TMnCA
from the contents of TMnCB.
■
To set up timer 4:
Use the MOV instruction for this
setup and only use 16-bit write
operations.
This step stops the TM4BC
count and clears both TM4BC
and the S-R flip-flop to 0.
1. Set the operating mode in the timer 4 mode register (TM4MD). Disable timer
4 counting and interrupts. Select up counting. Set the TM4NLP bit to 0 to
select looped counting from 0 to x’FFFF’. Select B
OSC
/4 as the clock source.
TM4MD (example) x’00FE80’
2. Set the TM4NLD bit of the TM4MD register to 1 and the TM4EN bit to 0.
This enables TM4BC and the S-R flip-flop. This step ensures stable opera-
tion. If it is omitted, the binary counter may not count the first cycle. Do not
A. Chip Level
B. Block Level
Figure 4-35 Block Diagram of Single-Phase Capture Input Using Timer 4
TM4IA
P3
P6
P4
P5
CORE
Interrupts
Timers 0-3
Timers 4-5
ROM, RAM
Bus Controller
Serial I/Fs
ADC
P2
TM4IA
Interrupt B
B
OSC
/4
up
TM4BC
Timer 4
TM4CA
TM4CB
TQ
TQ
R
S
Q
Controller
Bit:1514131211109876543210
TM4
EN
TM4
NLD
——
TM4
UD1
TM4
UD0
TM4
TGE
TM4
ONE
TM4
MD1
TM4
MD0
TM4
ECLR
TM4
LP
TM4
ASEL
TM4
S2
TM4
S1
TM4
S0
Setting:0000000010001 or 0011