MiTAC 8170 Laptop User Manual


 
132
8170 N/B MAINTENANCE
5.4 PCI4410(PCMCIA/1394 LINK Controller )
16-Bit PC Card Address and Data Terminals
Name Type Description
ADDR[0:25]
O PC Card address. 16-bit PC Card address lines. ADDR25 is the most
significant bit
DATA[0:15]
I/O
PC Card data. 16-bit PC Card data lines. DATA15 is the most
significant bit.
16-Bit PC Card Interface Control Terminals
Name Type Description
BVD1
(STSCHG#/RI#)
I
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC
Cards that include batteries. BVD1 is used with BVD2 as an
indication of the condition of the batteries on a memory PC Card.
Both BVD1 and BVD2 are high when the battery is good. When
BVD2 is low and BVD1 is high, the battery is weak
and should be replaced. When BVD1 is low, the battery is no longer
serviceable and the data in the memory PC Card is lost. See Section
5.6, ExCA Card Status-Change-Interrupt Configuration Register, for
enable bits. See Section 5.5, ExCA Card Status-Change Register, and
Section 5.2,ExCA Interface Status Register, for the status bits for this
signal. Status change. STSCHG# is used to alert the system to a
change in the READY, write protect, or battery voltage dead
condition of a 16-bit I/O PC Card. Ring indicate. R# is used by 16-
b
it
modem cards to indicate a ring detection.
BVD2
(SPKR#)
I Battery voltage detect 2. BVD2 is generated by 16-bit memory PC
Cards that include batteries. BVD2is used with BVD1 as an
indication of the condition of the batteries on a memory PC Card.
Both BVD1and BVD2 are high when the battery is good. When
BVD2 is low and BVD1 is high, the battery is weak and should be
replaced. When BVD1 is low, the battery is no longer serviceable and
the data in the memory PC Card is lost. See Section 5.6, ExCA Card
Status-Change-Interrupt Configuration Register, for enable bits. See
Section 5.5, ExCA Card Status-Change Register, and Section 5.2,
ExCA Interface Status Register, for the status bits for this signal.
Speaker. SPKR# is an optional binary audio signal available only
when the card and socket have been configured for the 16-bit I/O
interface. The audio signals from cards A and B are combined by the
PCI4410A device and are output on SPKROUT.DMA request. BVD2
can be used as the DMA request signal during DMA operations to a
16-bit PC Card that supports DMA. The PC Card asserts BVD2 to
indicate a request for a DMA operation.
CD1#
CD2#
I Card detect 1 and Card detect 2. CD1# and CD2# are connected
internally to ground on the PC Card. When a PC Card is inserted into
a socket, CD1# and CD2# are pulled low. For signal status, see
Section 5.2, ExCA Interface Status Register.
Name Type Description
CE1#
CE2#
O Card enable 1 and card enable 2. CE1# and CE2# enable even- and
odd-numbered address bytes. CE1#enables even-numbered address
bytes, and CE2# enables odd-numbered address bytes.
INPACK#
I Input acknowledge. INPACK# is asserted by the PC Card when it
can respond to an I/O read cycle at the current address.DMA request.
INPACK# can be used as the DMA request signal during DMA
operations from a 16-bit PC Card that supports DMA. If it is used as a
strobe, the PC Card asserts this signal to indicate a request for a DMA
operation.
IORD#
O I/O read. IORD# is asserted by the PCI4410A device to enable 16-
b
it
I/O PC Card data output during host I/O read cycles. DMA write.
IORD# is used as the DMA write strobe during DMA operations from
a 16-bit PC Card that supports DMA. The PCI4410A device asserts
IORD# during DMA transfers from the PC Card to host memory.
IOWR#
O I/O write. IOWR# is driven low by the PCI4410A device to strobe
write data into 16-bit I/O PC Cards during host I/O write cycles.
DMA read. IOWR# is used as the DMA write strobe during DMA
operations from a 16-bit PC Card that supports DMA. The PCI4410A
device asserts IOWR during transfers from host memory to the PC
Card.
OE#
O Output enable. OE# is driven low by the PCI4410A device to enable
16-bit memory PC Card data output during host memory read cycles.
DMA terminal count. OE# is used as terminal count (TC) during
DMA operations to a 16-bit PC Card that supports DMA. The
PCI4410A device asserts OE# to indicate TC for a DMA write
operation.
READ
IREQ#
I Ready. The ready function is provided by READY when the 16-bit
PC Card and the host socket are configured for the memory-only
interface. READY is driven low by the 16-bit memory PC Cards to
indicatethat the memory card circuits are busy processing a previous
write command. READY is driven high when the 16-bit memory PC
Card is ready to accept a new data-transfer command. Interrupt
request. IREQ# is asserted by a 16-bit I/O PC Card to indicate to the
host that a device on the 16-bit I /O PC Card requires service by the
host software. IREQ# is high (deasserted) when no interrupt is
requested.