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MELSEC-Q
6 DATA COMMUNICATION USING THE NON PROCEDURE PROTOCOL
(2) Receive data list
The following describes the data list when data received from an external device
is stored to the receive area.
1) The receive message is stored to the Q series C24 buffer memory (receive
data storage area).
2) The data is stored to the receive data storage area in low address (L)
(H),
next address (L)
(H) order.
Under the following conditions, when the receive data count is an odd
byte, 00
H
is stored in the upper byte of the final data storage position:
• When the unit for the received data count is designated in bytes.
• When data reception is performed using the receive complete code.
(Example) When receive arbitrary data area "ABCDEFG123" was stored
(The receive area is the default value.)
600
H
601
H
602
H
603
H
604
H
605
H
606
H
(B)
42
H
(C)
43
H
(D)
44
H
(E)
45
H
(F)
46
H
(G)
47
H
(1)
31
H
(2)
32
H
(3)
33
H
"321GFEDCBA"
Head
……
(A)
41
H
Q series C24
( 1)
From external
device
OS area
The receive data is stored in low
address (L)
→ (H), next address
(L)
→ (H) order in the order in which
it is received.
Receive data storage area
Receive data count storage area
5 or 10
Buffer memory
CH1
address
1 The OS area of the Q series C24 shown in the above diagram is the
memory (8448 bytes) that temporarily stores the data to be received while a
request for the reading of the receive data is being made to the PLC CPU.
(The user cannot read the receive data in the OS area).
When the sequence program finishes reading the receive data in the
buffer memory in response to the read request, the receive data in the OS
area, and any succeeding receive data, is stored successively in the
receive area of the buffer memory when the next read request is issued.
Also, when the OS area's free space, which stores the receive data, is
reduced to 64 bytes default value or less, a request to discontinue data
reception from the external device is issued by the following transmission
control (the RS signal does not turn OFF):
• When DTR control is set, the DTR signal turns OFF.
• When DC1/DC3 control is set, DC3 is sent.
When there is no more free space in the OS area to store receive data,
an SIO error occurs and the SIO information bit in the communication
error information storage area (address: 201
H
/202
H
) in the buffer
memory turns ON. In that case, succeeding receive data is discarded
until a free space becomes available in the OS area.
For more details on the transmission control, see Chapter 7 of the
User's Manual (Application).