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TNETX4090
ThunderSWITCH II
9-PORT 100-/1000-MBIT/S ETHERNET
SWITCH
SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999
67
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MII transmit (see Figure 22)
NO. MIN MAX UNIT
1 t
d(Mxx_TXD)
Delay time, from Mxx_TCLK↑ to Mxx_TXD3–MxxTXD0 valid 5 15 ns
1 t
d(Mxx_TXEN)
Delay time, from Mxx_TCLK↑ to Mxx_TXEN valid 5 15 ns
1 t
d(Mxx_TXER)
Delay time, from Mxx_TCLK↑ to Mxx_TXER valid 5 15 ns
Mxx_TXD3–Mxx_TXD0
Mxx_TXEN
Mxx_TXER
1
Mxx_TCLK
Figure 22. MII Transmit
MII clock (see Figure 23)
NO. MIN MAX UNIT
1 t
r(Mxx_CLK)
Pulse width low Mxx_RCLK, Mxx_TCLK 35% 65%
2 t
h(Mxx_CLK)
Pulse width high Mxx_RCLK, Mxx_TCLK 35% 65%
3 t
w(Mxx_CLK)
Cycle time Mxx_RCLK, Mxx_TCLK 2.5 25 MHz
Mxx_RCLK
Mxx_TCLK
1 2
3
Figure 23. MII Clock