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Troubleshooting 4-17
SEC_FORCE_MAX_RATIO* SEC 08 Tune CPU frequency ratio to
maximum level
SEC_GO_TO_SECSTARTUP SEC 09 Setup BIOS ROM cache
SEC_GO_TO_PEICORE SEC 0A Enter Boot Firmware Volume
* 3rd party relate functions – Platform dependence.
Table 4-3. PEI Phase POST Code Table:
Functionality Name (Include\
PostCode.h)
Phase Post Code Description
PEI_SIO_INIT P EI 70 Super I/O Initialization
PEI_CPU_REG_INIT P EI 71 CPU Early Initialization
PEI_CPU_AP_INIT* P EI 72 Multi-processor Early Initial
PEI_CPU_HT_RESET* PEI 73 HyperTransport Initialization
PEI_PCIE_MMIO_INIT P EI 74 PCIE MMIO BAR Initialization
PEI_NB_REG_INIT P EI 75 North Bridge Early Initialization
PEI_SB_REG_INIT PEI 76 South Bridge Early Initialization
PEI_PCIE_TRAINING* PEI 77 PCIE Training
PEI_TPM_INIT P EI 78 TPM Initialization
PEI_SMBUS_INIT P EI 79 SMBUS Early Initialization
PEI_PROGRAM_CLOCK_GE
N
PEI 7A Clock Generator Initialization
PEI_IGD_EARLY_INITIAL * PEI 7B Internal Graphic device early
Initialization
PEI_HECI_INIT* PEI 7C HECI Initialization
PEI_WATCHDOG_INIT* PEI 7D Watchdog timer Initialization
PEI_MEMORY_INIT P EI 7E Memory Initial for Normal boot.
PEI_MEMORY_INIT_FOR_CR
ISIS
PEI 7F Memory Initial for Crisis Recovery
PEI_MEMORY_INSTALL PEI 80 Simple Memory test
PEI_TXTPEI* PEI 81 TXT function early Initialization
PEI_SWITCH_STACK PEI 82 Start to use Memory
PEI_MEMORY_CALLBACK P EI 83 Set cache for physical memory
PEI_ENTER_RECOVERY_MO
DE
PEI 84 Recovery device Initialization
Table 4-2. SEC Phase POST Code Table:
Functionality Name (Include\
PostCode.h)
Phase PostCode Description