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Appendix G Compaq/Adaptec 29160N SCSI Host Adapter
G.2 FUNCTIONAL DESCRIPTION
A block diagram of the SCSI Adapter is shown in Figure L-2. The adapter’s architecture is based
on the AIC-7892 SCSI controller working off the 32-bit, 66-/33-MHz PCI bus. Providing full bus
mastering capability, the adapter supports data transfers up to 266 MB/s using the burst mode rate
on a 66-MHz 32-bit PCI bus. The AIC-7892 controller is an Ultra160 controller with an on-board
20-MIPS SCSI sequencer that can process SCSI commands without intervention from the host
microprocessor. The sequencer uses micro-code that is downloaded from the host during
initialization. Single-ended SCSI drivers are built into the controller and a 1-K data FIFO and an
internal 4-KB SRAM memory. An LED is provided to indicate SCSI bus activity.
The AIC7892 provides a memory interface that is used by the Serial EEPROM and the BIOS
ROM. The serial EEPROM stores non-volatile configuration data and the BIOS ROM (which is a
flash ROM) contains additional configuration data and SCSI functions. The programmable array
logic (PAL) controls the Serial EEPROM-to-AIC7892 interface.
SCSI
Activity
PAL
Chip
Active Ultra160
SE Term.
Active Ultra160
SE/LVD Term.
Int. SCSI Connector (SE/LVD)
PCI
Slot
AIC3860
Transceiver
Chip
Ext. SCSI Connector (SE)
Int. SCSI Connector (SE)
40-MHz
Clock
BIOS
ROM
Serial
EEPROM
AIC7892
SCSI
Controller
PCI Bus
Figure G–2. Compaq/Adaptec Ultra SCSI Adapter Card Block Diagram
The AIC7892 controller supports dual-mode low-voltage differential (LVD) SCSI I/O up to the
Ultra160 data rate of 160 Mbytes. Both single-ended (SE) and LVD devices can co-exist on the
SCSI bus, although operation will default to the SE mode. In SE mode, transfer rates are limited
to the speed of the slower device. High-voltage differential (HVD) devices are supported for rates
up to Ultra speeds.
The AIC7892 also supports cyclic redundancy check (CRC) codes, an improvement over parity
checking used earlier.
Compaq Personal Computers
Original - December 2000
G-2