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Technical Reference Guide
AGP 2X Transfers
During AGP 2X transfers, clocking is basically the same as in 1X transfers except that the 66-
ure 4-
x
evel for
F 6. AGP 2X Data Transfer (Pe sf te: 532 M
A 4X Tra
The AGP 4X t ixteen b of e tran e.
2 h is used only ifying strobe
s s are use ansf th es. A Figure 4-7, 4-byt
nA is latched by the falling edge of AD_STBx while DnB is latched by the falling edge of
AD_STB
MHz CLK signal is used to qualify only the control signals. The data bytes are latched by an
additional strobe (AD_STBx) signal so that an 8-byte transfer occurs in one CLK cycle (Fig
6). The first four bytes (DnA) are latched by the receiving agent on the falling edge of AD_STB
and the second four bytes (DnB) are latched on the rising edge of AD_STBx. The signal l
AGP 2X transfers may be 3.3 or 1.5 VDC.
GNT-
T1 T2 T3 T4 T5 T6 T7
TRDY-
CLK
AD_STBx
AD
D1A D2A D3A
D1B D2B D3B D4A D4B
ST0..2
00x
xxx
xxx
xxx
igure 4- ak Tran er Ra B/s)
GP nsfers
ransfer rate allows s ytes data to b sferred in one clock cycl As in
X transfers t e 66-MHz CLK signal for qual control signals while
ignal d to latch each 4-byte tr er on e AD lin s shown in e
block D
x-. The signal level for AGP 4X transfers is 1.5 VDC.
xxx
xxx
T1 T2 T3
T4
AD_STBx
AD
D1A D2A D3A D1B D2B D3B D4A D4B
CLK
AD_STBx-
00x xxx xxx xxx
ST0..2
Compaq Evo and Workstation Personal Computers
Featuring the Intel Pentium 4 Processor
Second Edition - January 2003
4-13