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PMC/PCI INTERFACE
PCI Bus Control Signals
3-12 CC1000dm User’s Manual 10004281-02
3
TDO:
Test Data Output signal acts as the output port for test data and test instructions out of
the PMC slots during TAP operation.
TMS:
Test Mode Select controls the state of the TAP controller in the PMC slots.
TDI:
Test Data Input signal acts as the input port for test data and test instructions into the
PMC slots during TAP operation.
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PCI BUS CONTROL SIGNALS
The following signals for the PCI interface are available on connectors J1x and J2x.
Refer to the PCI specification for detailed usage on these signals. All signals are bi-
directional unless otherwise stated.
ACK64*, REQ64*:
ACKNOWLEDGE and REQUEST output signals are used to tell a 64-bit PCI device
whether to use the 64-bit or the 32-bit data width.
AD00-AD63:
ADDRESS and DATA bus (bits 0-63) tri-state lines are used for both address and data
handling. A bus transaction consists of an address phase followed by one or more data
phases.
C/BE0* - C/BE7*:
BUS COMMAND and BYTE ENABLES tri-state lines have different functions depending
on the phase of a transaction. During the address phase of a transaction these lines
define the bus command. During a data phase the lines are used as byte enables.
CLK:
CLOCK input signal to the PMC modules provides timing for PCI transactions.
DEVSEL*:
DEVICE SELECT sustained tri-state signal indicates when a device on the bus has been
selected as the target of the current access.
EREADY:
ENUMERATION READY open-drain output signal of a non-Monarch PrPMC indicates it
has completed its on-board initialization and can respond to PCI bus enumeration. As
an input signal to the Monarch PrPMC, it indicates all non-Monarchs have completed
their on-board initialization and can respond to PCI bus enumeration.
FRAME*:
CYCLE FRAME sustained tri-state line is driven by the current master to indicate the
beginning of an access, and continues to be asserted until the transaction reaches its
final data phase.
GNT*:
GRANT input signal indicates that access to the bus has been granted to a particular
master. Each master has its own GNT*.
IDSEL:
INITIALIZATION DEVICE SELECT input signal acts as a chip select during configuration
read and write transactions.
IDSELB:
INITIALIZATION DEVICE SELECT B; if the optional second PCI agent is implemented,
then IDSELB is connected as its IDSEL input.