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Selftest Failures
81
2x12 ICACHE_ALINE_OPEN {FLT}, ICACHE_ALT_WRITE
{TEST}
FLT extended info D000/F000 D=data open,
F=tag open
Control Address[0:15]
Control Address[16:31]
Test Address[0:15]
Test Address[16:31]
Actual data[0:15]
(expected data is always 0)
Actual data[16:31]
Actual data[32:47]
Actual data[48:63]
Actual data[64:79]
(data failure only)
Actual data[80:95]
(data failure only)
Actual data[96:111]
(data failure only)
Actual data[112:127]
(data failure only)
2x20 ICACHE_RAM Icache RAM selftest
2x2Y ICACHE_RAM Y = forward progress
2x21 ICACHE_RAM_DATA_ERR Icache RAM date er-
ror
FLT extended info D000
Address in error[0:15]
Address in error[16:31]
Expected data[0:15]
Expected data[16:31]
Expected data[32:47]
Expected data[48:63]
Expected data[64:79]
Expected data[80:95]
Expected data[96:111]
Expected data[112:127]
Actual data[0:15]
Actual data[16:31]
Actual data[32:47]
Actual data[48:63]
Actual data[64:79]
Actual data[80:95]
Actual data[96:111]
Actual data[112:127]
2x22 ICACHE_RAM_TAG_ERR {FLT}, ICACHE_ALT_READ
{TEST}
FLT extended info
F000 Address in error[0:15]
Address in error[16:31]
Expected data[0:15]
Expected data[16:31]
Expected data[32:47]
Expected data[48:63]
Actual data[0:15]
Actual data[16:31]
Actual data[32:47]
Actual data[48:63]
2x23-2x24 ICACHE_RAM Icache RAM selftest
2x25 ICACHE_RAM_LD_D_ERR Icache RAM load ver-
ify data error
FLT extended info same as 2x21
2x26 ICACHE_RAM_LD_T_ERR Icache RAM load ver-
ify tag error
FLT extended info same as 2x22