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Baseboard Description 15
CAUTION
Lithium Battery: See "Replacing the Backup Battery" on page 68 of this
product guide for instructions on replacing and disposing of the Lithium
Battery.
Processor
Each Intel Pentium III Xeon processor is packaged in a single edge contact (S.E.C.) cartridge. The
cartridge includes the processor core with an integrated 32 KB primary (L1) cache, the secondary
(L2) cache, a thermal plate, and a plastic cover.
The processor core and L2 cache components are on a pre-assembled printed circuit board,
approximately 5 inches by 6 inches. The L2 cache and processor core L1 cache interface use a
private bus isolated from the processor host bus. The L2 cache bus operates at the processor core
frequency.
Each S.E.C. cartridge connects to the baseboard through a 330-pin SC330.1 compliant edge
connector. A retention module attached to the baseboard secures the cartridge. Depending on
configuration, the system supports one to four processors.
The processor external interface is MP-ready and operates at 100 MHz. The processor contains a
local Advanced Configuration and Power Interface (APIC) unit for interrupt handling in
multiprocessor (MP) and uniprocessor (UP) environments.
Table 2. SKA4 Pentium Xeon Processor Family Support Matrix
Name Frequency Cache Size Support (Y/N)
Pentium II Xeon processor 400 MHz, 450 MHz 512k, 1M, 2M No
Pentium III Xeon processor 500 MHz
550 MHz
512k, 1M, 2M Yes
Pentium III Xeon processor 600 MHz + 256k No
2.8 V Pentium III Xeon processor 600 MHz + 1M, 2M Yes
5/12 V Pentium III Xeon processor 600 MHz + 1M, 2M No
The L2 cache is located on the substrate of the S.E.C. cartridge. The cache:
• Is offered in 512 KB, 1 MB, and 2 MB configurations
• Has ECC
• Operates at the full core clock rate