Lantronix 900-691-R Network Card User Manual


 
5: Interface Settings
xPico® Wi-Fi® Embedded Device Server User Guide 32
Serial Perpheral Interface (SPI) Settings
SPI settings pertaining to the bus master device can be modified in the xPico Wi-Fi unit. SPI
settings, like line settings, allow for the selection of a protocol to be used with SPI. Changes take
effect immediately.
Table 5-2 SPI Configuration Settings
To Configure SPI Settings
Using Web Manager
To configure the SPI bus master device settings, click SPI in the menu and select
Configuration.
Using CLI
To enter the SPI command level: config -> SPI
Using XML
Include in your file: <statusgroup name = "SPI" instance = "1">
Line Settings Description
Name Enter a name or short description for the line, if desired. By default, there is
no name specified. This name is for display only.
State Select to Enable or Disable the SPI.
Protocol Select the operational protocol for connection to the SPI:
None: selects no application to connect to the SPI.
Monitor: selects Monitor application to connect to the SPI.
Target Speed Set the target clock speed of the SPI in Hz (range is 234.375 KHz - 30 MHz).
The target speed may be lowered to the closest operating speed capability of
the device. If so, a warning will be noted. 0 or clearing the selection selects
the minimum speed.
Idle Clock Level Select the level of the clock or clock polarity (CPOL) when the clock is idle:
Low: the idle clock is at a low level. This is equivalent to CPOL=0.
High: the idle clock is at a high level. This is equivalent to CPOL=1.
Clock Edge Select the clock edge or clock phase (CPHA) for latching data:
First: each bit is latched on the first edge of the clock. This is equivalent to
CPHA=0.
Second: each bit is latched on the second edge of the clock. This is
equivalent to CPHA=1.
Bits Per Word Select the number of bits per word to transfer. Choices in drop-down menu
are 8 or 16.
First Transfer Select the first transfer bit of each word. Choicse in drop-down menu include:
Most Significant Bit
Least Signficant Bit