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HighWire HW400c/2 User Reference Guide Rev 1.0
4.2.8 Board Option Register (BOR)
for the
W400c/2 board.
Table 37. Board Option Register (BOR) Offset Address 0x0D
The Board Option Register (BOR) is a Read Only register. This register indicates the
configuration and product type. Bit 5, bit 2, bit 1 and bit 0 are always “1”
H
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
BUSMD1B BUSMD1A 1 Reserved Reserved 1 1 1
BUSMD1B
1 TMC Site B PCI Capable
USMD1A
4.2.9 General Purpose Register (GPR)
r (GPR) is a Read/Write register that can be used to
ion to the IPMI controller. The HW400c/2 boot status
Table 38. General Purpose Register (GPR) Offset Address 0x0E
Bit 7 Bit 0
= 0 PTMC Site B PCI Incapable
= P
B = 0 PTMC Site A PCI Incapable
= 1 PTMC Site A PCI Capable
The General Purpose Registe
indicate boot status informat
can also be indicated by the on board surface-mount LEDs during the boot process
(LEDB[1:0] = 00).
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
BTST3 BTST2 BTST1 BTST0 Reserved Reserved Reserved Reserved
B tus l (defau
= 0001 Boot status level = 1
= 0010 Boot status level = 2
B
B
…
= 1111 Boot status level = 15
BTST[3:0]
= 0000 oot sta evel = 0 lt)
= 0011 oot status level = 3
= 0100 oot status level = 4
…. .
October 10, 2006 Copyright 2006, SBE, Inc. Page 52