Filter
Top Products
ListofFigures
1DDR2MemoryControllerBlockDiagram...............................................................................10
2DDR2MemoryControllerSignals........................................................................................12
3DDR2MRSandEMRSCommand......................................................................................14
4RefreshCommand.........................................................................................................15
5ACTVCommand...........................................................................................................15
6DCABCommand...........................................................................................................16
7DEACCommand...........................................................................................................16
8DDR2READCommand...................................................................................................17
9DDR2WRTCommand....................................................................................................18
10ByteAlignment..............................................................................................................19
11LogicalAddress-to-DDR2SDRAMAddressMapfor32-BitSDRAM...............................................19
12LogicalAddress-to-DDR2SDRAMAddressMapfor16-bitSDRAM................................................20
13LogicalAddress-to-DDR2SDRAMAddressMap......................................................................21
14DDR2SDRAMColumn,Row,andBankAccess......................................................................22
15DDR2MemoryControllerFIFOBlockDiagram........................................................................23
16DDR2MemoryControllerResetBlockDiagram.......................................................................26
17ConnectingtoTwo16-BitDDR2SDRAMDevices....................................................................30
18ConnectingtoaSingle16-BitDDR2SDRAMDevice.................................................................31
19ConnectingtoTwo8-BitDDR2SDRAMDevices......................................................................32
20ModuleIDandRevisionRegister(MIDR)...............................................................................37
21DDR2MemoryControllerStatusRegister(DMCSTAT)..............................................................37
22SDRAMConfigurationRegister(SDCFG)..............................................................................38
23SDRAMRefreshControlRegister(SDRFC)............................................................................40
24SDRAMTiming1Register(SDTIM1)...................................................................................41
25SDRAMTiming2Register(SDTIM2)...................................................................................43
26BurstPriorityRegister(BPRIO)..........................................................................................44
27DDR2MemoryControllerControlRegister(DMCCTL)...............................................................45
4ListofFiguresSPRUEK5A–October2007
SubmitDocumentationFeedback