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1Introduction
1.1PurposeofthePeripheral
1.2Features
1.3FunctionalBlockDiagram
User'sGuide
SPRUEK5A–October2007
DSPDDR2MemoryController
ThisdocumentdescribestheDDR2memorycontrollerinthedevice.
TheDDR2memorycontrollerisusedtointerfacewithJESD79D-2AstandardcompliantDDR2SDRAM
devices.MemorytypessuchasDDR1SDRAM,SDRSDRAM,SBSRAM,andasynchronousmemories
arenotsupported.TheDDR2memorycontrollerSDRAMcanbeusedforprogramanddatastorage.
TheDDR2memorycontrollersupportsthefollowingfeatures:
•JESD79D-2AstandardcompliantDDR2SDRAM
•256Mbytememoryspace
•Databuswidthof32or16bits
•CASlatencies:2,3,4,and5
•Internalbanks:1,2,4,and8
•Burstlength:8
•Bursttype:sequential
•1CEsignal
•Pagesizes:256,512,1024,and2048
•SDRAMauto-initialization
•Self-refreshmode
•Prioritizedrefresh
•Programmablerefreshrateandbacklogcounter
•Programmabletimingparameters
TheDDR2memorycontrolleristhemaininterfacetoexternalDDR2memory(seeFigure1).Master
peripherals,suchastheEDMAcontrollerandtheCPUcanaccesstheDDR2memorycontrollerthrough
theswitchedcentralresource(SCR).TheDDR2memorycontrollerperformsallmemory-related
backgroundtaskssuchasopeningandclosingbanks,refreshes,andcommandarbitration.
SPRUEK5A–October2007DSPDDR2MemoryController9
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