Filter
Top Products
Appendix A
Specifications
Mainframe
Specifications
Pacer (50% duty cycle): Programmable intervals: 500 nsec to 8.389 sec with 500 nsec resolution.
Accuracy:
First pulse after trigger: 0.01% of programmed time + 600 to 850 nsec.
Additional pulses: 0.01% of programmed time ± 50 nsec.
Number of pulses: 1 through 8388607 or continous.
Drive capability:
V
LO
≤ 0.75 V @ 4 mA
V
HI
≥ 3.4 V @ -4 mA
Rise Time/Fall Time: 320 nsec/90 nsec.
Real-time Clock: Accuracy: 0.01% of elapsed time since last sset ± 1 sec @ 25° C.
Temperature variation: ± 0.01% of elapsed time since last set, over full
temperature range.
Resolution: 1 sec.
Non-volatile lifetime: 60 days without additional RAM.
Battery life: 1 year typical, NiCd battery.
Trigger Input: TTL compatible, minimum pulse width 300 nsec.
Non-volatile added
memory storage
lifetime:
Non-volatile added storage is backed up by NiCd battery. The table below shows
minimum and typical lifetimes, which varry according to the amount of memory
installed.
RAM (MBytes) MIN Lifetime (hours) Typical lifetime (days)
0.5 240 320
1.0 130 180
1.5 90 120
2.0 72 90
Slots: 7 B-size and 3 A-size
EMC, RFI, Safety: See Declaration of Conformity.
Specifications A-1