Compaq 4000S Personal Computer User Manual


 
Chapter 2 System Overview
Compaq Deskpro 4000N and 4000S Personal Computers
First Edition - September 1997
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2.4 SYSTEM ARCHITECTURE
The Compaq Deskpro 4000N and 4000S Personal Computers featuring MMX technology are
based on a Pentium MXX microprocessor matched with a support chipset that is complimentary
in design. Both the “N” and “S” systems share the same basic architecture (Figure 2-7), which
utilizes three main buses: the Host bus, the Peripheral Component Interconnect (PCI) bus, and
the Industry Standard Architecture (ISA) bus.
The Host bus provides high performance support for CPU, cache and system memory accesses,
and on these systems is set to operate at 66 MHz. The 32-bit PCI bus provides support for the
graphics subsystem, the EIDE controllers, and expansion devices designed for high performance.
The PCI bus operates at 33 MHz. The ISA bus provides a standard 8-MHz interface for the
input/output (I/O) devices such as the keyboard, diskette drive, serial and parallel interfaces, as
well as the addition of 16- or 8-bit expansion devices.
The CPU/PCI and PCI/ISA bridge functions are handled by the specific support chipset matched
with the microprocessor employed. The support chipset also provides memory controller and data
buffering functions as well as bus control and arbitration functions.
The I/O port functions and diskette drive controller are integrated into the PC87307 I/O
Controller. This component also includes the real time clock and battery-backed configuration
memory (CMOS).
Table 2-1 lists the architectural highlights.
Table 2–1.
Architectural Comparison
Table 2-1
.
Architectural Overview
Type
Microprocessor Pentium MMX
Support Chipset VIA VP2
System Memory
Standard installed:
Expandable to:
16/32 MB [1]
256 MB
Cache Memory
L1:
L2:
32 KB [2]
256 KB
Graphics Subsystem S3 TrioV2-based
integrated on board
NOTES:
[1] Depending on model
[2] Integrated with the microprocessor
The following subsections provide a description of the key functions and subsystems.