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Chapter 4 System Support
Compaq Deskpro 4000N and 4000S Personal Computers
First Edition - September 1997
4-10
4.2.6 PCI CONFIGURATION
PCI bus operations, especially those that involve ISA bus interaction, require the configuration of
certain parameters such as PCI IRQ routing, top of memory accessable by ISA, SMI generation,
and clock throttling characteristics. These parameters are handled by the PCI/ISA bridge
function (PCI function #0) of the South Bridge component and configured through the PCI
configuration space registers listed in Table 4-6. Configuration is provided by BIOS at power-up
but re-configurable by software .
Table 4–6.
PCI/ISA Bridge Configuration Registers for the VT82C586 (P55C-Based Systems)
Table 4-6.
PCI/ISA Bridge Configuration Registers
(VT82C586 Function 0)
PCI Config.
Addr. Register
Reset
Value
PCI Config.
Addr. Register
Reset
Value
00, 01h Vender ID 1106h 4C..4Eh ISA DMA/Master Mem. Acc. 00h
02, 03h Device ID 0586h 4Fh ISA DMA/Master Mem. Acc. 03h
04, 05h Command 50h PnP DRQ Routing 24h
06, 07h Status 54h PCI Interrupt Polarity 00h
08h Revision ID 55..57h PCI Interrupt Routing 00h
09-0Bh Class Code 80h Primary Activity Detect En. 00h
0Eh Header Type 82h Primary Activity Detect Sts.
40h ISA Bus Control 00h 84, 85h Reserved
41h Refresh & Port 92 Control 00h 86, 87h Reserved
42h ISA Clock Control 00h 88..8Bh Timer Control Registers 00h
43h ROM Decoding Cntl. 00h 8Ch Conserve Mode/Sec. Event 00h
44 Keyboard Controller Control 00h 8Dh Miscellaneous Control 00h
45h Type F DMA Control 00h 8Eh STPCLK- Duty Cycle 00h
46, 47h Misc. Control 00h 90..93h ISA INT. As Primary Event 00h
48h Misc. Control 01h 94h Ext. SMI Pin Status (RO)
4Ah IDE Interrupt Routing 04h 95, 96h Power-Up Strap Options (RO)
NOTE: Assume unmarked locations/gaps as reserved.