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MOTLoad Firmware
MVME3100 Single Board Computer Installation and Use (6806800M28C)
53
Inbound window 0 (ITAT0) is not enabled; Virtual FIFO at 256 bytes, 2eSST timing at
SST320, respond to 2eSST, 2eVME, MBLT, and BLT cycles, A32 address space, respond to
Supervisor, User, Program, and Data cycles. Image maps from 0x00000000 to 0x1FFF0000
on the VMbus, translates 1x1 to the PCI-X bus (thus 1x1 to local memory). To enable this
window, set bit 31 of ITAT0 to 1.
z MVME3100> vmeCfg –s –o1
Displaying the selected Default VME Setting
- interpreted as follows:
Outbound Image 1 Attribute Register = 80001462
Outbound Image 1 Starting Address Upper Register = 00000000
Outbound Image 1 Starting Address Lower Register = 91000000
Outbound Image 1 Ending Address Upper Register = 00000000
Outbound Image 1 Ending Address Lower Register = AFFF0000
Outbound Image 1 Translation Offset Upper Register = 00000000
Outbound Image 1 Translation Offset Lower Register = 70000000
Outbound Image 1 2eSST Broadcast Select Register = 00000000
MVME3100>
Outbound window 1 (OTAT1) is enabled, 2eSST timing at SST320, transfer mode of 2eSST,
A32/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0x91000000-0xAFFF0000 and translates them onto the VMEbus using an offset of
0x70000000, thus an access to 0x91000000 on the PCI-X Local Bus becomes an access to
0x01000000 on the VMEbus.
z MVME3100> vmeCfg –s –o2
Displaying the selected Default VME Setting
- interpreted as follows:
Outbound Image 2 Attribute Register = 80001061
Outbound Image 2 Starting Address Upper Register = 00000000
Outbound Image 2 Starting Address Lower Register = B0000000
Outbound Image 2 Ending Address Upper Register = 00000000
Outbound Image 2 Ending Address Lower Register = B0FF0000
For Inbound Translations, the Upper Translation Offset Register needs to be set to 0xFFFFFFFF to
ensure proper translations to the PCI-X Local Bus.