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Functional Description
MVME3100 Single Board Computer Installation and Use (6806800M28C)
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4.10.2 TSi148 VME Controller
The VMEbus interface for the MVME3100 is provided by the TSi148 ASIC. The TSi148 provides
the required VME, VME extensions, and 2eSST functions. Transceivers are used to buffer the
VME signals between the TSi148 and the VME backplane. Refer to the TSi148 User's Manual
listed in Appendix B, Related Documentation, for additional details and/or programming
information.
4.10.3 Serial ATA Host Controller
The sATA host controller uses the Silicon Image SiI3124A PCI-X to Serial ATA Controller. This
device provides four sATA channels at 1.5Gb/s and is compliant with the Serial ATA: High speed
serialized AT Attachment Specification, Revision 1.0. It also supports the native command
queuing feature of sATA II.
The MVME3100 uses two of the four sATA channels. Channel 0 is routed to a sATA connector
mounted on the front panel for an external drive connection. Channel 1 is routed to a planar
sATA connector for an "inside the chassis" drive connection. Collocated with the planar
connector is a sATA power connector. The sATA controller can operate in legacy (Native PCI
IDE) and Direct Port Access (DPA) mode.
The MVME3100 provides two programmable LEDs to indicate sATA channel activity.
Refer to the SiI3124A PCI-X to Serial ATA Controller Datasheet listed in Appendix B, Related
Documentation, for additional details and/or programming information
4.10.4 PCI-X-to-PCI-X Bridges
The MVME3100 uses two PLX PCI6520 PCI-X-to-PCI-X bridges to isolate the primary PCI bus,
bus A. These bridges isolate bus A from bus B with the PMC sites and from bus C with the USB
controller and PMCspan interface. The PCI6520 is a 64-bit, 133 MHz, PCI-X r1.0b compliant
device. It operates asynchronously between 33 MHz and 133 MHz on either primary or
secondary port. Refer to the PCI6520CB Data Book listed in Appendix B, Related
Documentation, for additional details and/or programming information.