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MVME7100 Single Board Computer Installation and Use (6806800E08A)
Hardware Preparation and Installation SMT Configuration Switch, S1
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2.4.1.1 Safe Start Switch
When the SAFE_START switch is OFF, it indicates that the normal ENV setting should be used.
When the switch is set to ON, GEVs, VPD, and SPD settings are ignored and known, safe,
values are used.
2.4.1.2 Boot Block B Select
When the switch is OFF, the flash memory map is normal and block A is selected as shown in
Figure 3. When the switch is ON, block B is mapped to the highest address.
2.4.1.3 Flash Bank Write Protect
When the FLASH BANK WP switch is OFF, it indicates that the entire NOR flash is not write-
protected. NOR flash is used for executing code. When the switch is ON, it indicates that the
flash is write-protected and any writes to the flash devices are blocked by hardware.
2.4.1.4 JTAG Pass-Thru
The JTAG Pass-Thru switch is in the OFF position for normal operation. The switch is ON for
pass-through mode.
2.4.1.5 Low Memory Offset
The CORE1 Low Memory Offset switch is in the OFF position for normal operation. The switch
is ON for enabling this feature.
2.4.1.6 PMC 133 MHz
The PMC 133 MHz switch is OFF for normal operation. When the switch is ON, the maximum
frequency of operation for the PMC sites is 133 MHz. 133 MHz operation should not be enabled
unless the PMC modules are designed to support 133 MHz operation. When the switch is OFF,
the maximum frequency is 100 MHz.
S1-5 CORE1 Low
Memory Offset
[OFF]
ON
Normal operation
S1-6 PMC 133 MHz [OFF]
ON
PMC 100 MHz maximum
PMC 133 MHz maximum
S1-7 Master WP [OFF]
ON
Master write protect disabled
Master write protect enabled
S1-8 Reserved
1. Switch status is readable from System Status Register 1, bit 5.
Table 2-5 Configuration Switch Settings (S1) (continued)
Switch Description Setting Function