Filter
Top Products
Chapter 5 Input/Output Interfaces
Table 5–5. Diskette Drive Interface Control Registers
Table 5-5.
Diskette Drive Interface Control Registers
Pri.
Addr.
Sec.
Addr.
Register
R/W
3F0h 370h Status Register A:
<7> Interrupt pending
<6> Reserved (always 1)
<5> STEP pin status (active high)
<4> TRK 0 status (active high)
<3> HDSEL status (0 = side 0, 1 = side 1)
<2> INDEX status (active high)
<1> WR PRTK status (0 = disk is write protected)
<0> Direction (0 = outward, 1 = inward)
R
3F1h 371h Status Register B:
<7,6> Reserved (always 1’s)
<5> DOR bit 0 status
<4> Write data toggle
<3> Read data toggle
<2> WGATE status (active high)
<1,0> MTR 2, 1 ON- status (active high)
R
3F2h 372h Digital Output Register (DOR):
<7,6> Reserved
<5,4> Motor 1, 0 enable (active high)
<3> DMA enable (active high)
<2> Reset (active low)
<1,0> Drive select (00 = Drive 1, 01 = Drive 2, 10 = Reserved, 11 = Tape drive)
R/W
3F3h 373h Tape Drive Register (available for compatibility) R/W
3F4h 374h Main Status Register (MSR):
<7> Request for master (host can transfer data) (active high)
<6> Transfer direction (0 – write, 1 = read)
<5> non-DMA execution (active high)
<4> Command busy (active high)
<3,2> Reserved
<1,0> Drive 1, 2 busy (active high)
Data Rate Select Register (DRSR):
<7> Software reset (active high)
<6> Low power mode enable (active high)
<5> Reserved (0)
<4..2> Precompensation select (default = 000)
<1,0> Data rate select (00 = 500 Kb/s, 01 = 300 Kb/s, 10 = 250 Kb/s, 11 = 2/1
Mb/s)
R
W
3F5h 375h Data Register:
<7..0> Data
R/W
3F6h 376h Reserved --
3F7h 377h Digital Input Register (DIR):
<7> DSK CHG status (records opposite value of pin)
<6..0> Reserved (0’s)
Configuration Control Register (CCR):
<7..2> Reserved
<1,0> Data rate select (00 = 500 Kb/s, 01 = 300 Kb/s, 10 = 250 Kb/s, 11 = 2/1
Mb/s)
R
W
NOTE: The most recently written data rate value to either DRSR or CCR will be in effect.
5-6 Compaq D315 and hp d325 Personal Computers
Featuring the AMD Athlon XP Processor
Second Edition – April 2003