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Intel® 631xESB/632xESB I/O Controller Hub Thermal Mechanical Design Guide 11
Packaging Technology
2 Packaging Technology
Intel 5000 Series chipset consist of three individual components: the Memory
Controller Hub (MCH), the Intel
®
6700PXH 64-bit PCI Hub (PXH) and the Intel
®
631xESB/632xESB I/O Controller Hub. Intel 5000 Series chipset MCH components use
a 42.5 mm, 10-layer flip chip ball grid array (FC-BGA) package (see Figure 2-1, , and
Figure 2-2). For information on the PXH package, refer to the Intel
®
6700PXH 64-bit
PCI Hub Thermal/Mechanical Design Guidelines. For information on the Intel
®
631xESB/632xESB I/O Controller Hub package, refer to the Intel
®
631xESB/632xESB
I/O Controller Hub Thermal/Mechanical Design Guidelines.
Figure 2-1. MCH Package Dimensions (Top View)
Figure 2-2. MCH Package Dimensions (Side View)
MCH
IHS
Handling
Exclusion
Area
42.5 mm.
42.5 mm.38.5 mm.
38.5 mm,
0.20 –C–
IHS
Substrate
0.435 ± 0.025 mm
See note 3
Seating Plane
2.44 ± 0.071 mm
See note 1.
Notes:
1. Primary datum -C- and seating plan are defined by the spherical crowns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conform to ANSI Y14.5M-1994
3. BGA has a pre-SMT height of 0.5mm and post-SMT height of 0.41-0.46mm
4. Shown before motherboard attach; FCBGA has a convex (dome shaped) orientation before reflow and is expected to have a slightly concave (bowl shaped)
orientation after reflow
0.20
See note 4.
3.79 ± 0.144 mm
4.23 ± 0.146 mm