Kawasaki 80C152 Computer Hardware User Manual


 
KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 115 of 120 Ver. 0.9 KS152JB2
TL1.7-0 Timer 1 LSB
The TL1 sfr is set to 00h on any reset.
There is unrestricted read/write access to this SFR.
TIMER 0 MSB
TH0.7-0 Timer 0 MSB
The TH0 sfr is set to 00h on any reset.
There is unrestricted read/write access to this SFR.
TIMER 1 MSB
TH1.7-0 Timer 1 MSB
The TH1 sfr is set to 00h on any reset.
There is unrestricted read/write access to this SFR.
PORT 1
P1.7-0 General purpose I/O port. Most instructions will read the port pins in case of a port
read access, however in case of read-modify-write instructions, the port latch is read.
The P1 sfr is set to FFh by a reset.
There is unrestricted read/write access to this SFR.
TH0.6
6
TH0.5
5
TH0.3
3
TH0.7
7
TH0.2
2
TH0.1
1
TH0.0
0
TH0.4
4
Bit:
Mnemonic: TH0 Address: 8Ch
TH1.6
6
TH1.5
5
TH1.3
3
TH1.7
7
TH1.2
2
TH1.1
1
TH1.0
0
TH1.4
4
Bit:
Mnemonic: TH1 Address: 8Dh
P1.6
6
P1.5
5
P1.3
3
P1.7
7
P1.2
2
P1.1
1
P1.0
0
P1.4
4
Bit:
Mnemonic: P1 Address: 90h