Kawasaki 80C152 Computer Hardware User Manual


 
KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 66 of 120 Ver. 0.9 KS152JB2
and then writing to TFIFO. TEN must be set before loading the transmit FIFO, as setting TEN
clears the transmit FIFO. TCDCNT should also be checked by user software and cleared if a col-
lision occurred on a prior transmission.
To enable the receiver, GREN (RSTAT.1) is set. After GREN is set, the GSC begins to look for a
valid BOF. After detecting a valid BOF the GSC attempts to match the received address byte(s)
against the address match registers. When a match occurs the frame is loaded into the GSC. Due
to the CRC strip hardware, there is a 40 or 24 bit time delay following the BOF until the first data
byte is loaded into RFIFO if the 32 or 16 bit CRC is chosen. If the end of frame is detected before
data is loaded into the receive FIFO, the receiver ignores that frame.
If the receiver detects a collision during reception in CSMA/CD mode and if any bytes have been
loaded into the receive FIFO, the RCABT flag is set. The GSC hardware then halts reception and
resets GREN. The user software needs to filter any collision fragment data which may have been
received. If the collision occurred prior to the data being loaded into RFIFO the CPU is not noti-
fied and the receiver is left enabled. At the end of a reception the RDN bit is set and GREN is
cleared. In HABEN mode this causes an acknowledgment to be transmitted if the frame did not
have a broadcast or multi-cast address. The user software can enable the interrupt for RDN to
determine when a frame is completed.
In DMA mode the interrupts are generated by the internal “transmit/receive done” (TDN,RDN)
conditions. When the CPU responds to TDN or RDN, checks are performed to see if the transmit
underrun error has occurred. The underrun condition is only checked when using the DMA chan-
nels.
Upon power up the CPU mode is initialized. General DMA control is covered in Section 4.0
DMA control of the GSC is covered in Section 3.5.4. If DMA is to be used for serving the GSC, it
must be configured into the serial channel demand mode and the DMA bit in TSTAT has to be set.
3.6.3 COLLISIONS AND BACKOFF
The actions that are taken by the GSC if a collision occurs while transmitting depend on where the
collision occurs. If a collision occurs in CSMA/CD mode following the preamble and BOF flag,
the TCDT flag is set and the transmit hardware completes a jam. When this type of collision
occurs, there will be no automatic retry at transmission. After the jam, control is returned to the
CPU and user software must then initiate whatever actions are necessary for a proper recovery.
The possibility that data might have been loaded into or from the GSC deserves special consider-
ation. If these fragments of a message have been passed on to other devices, user software may
have to perform some extensive error handling or notification. Before starting a new message, the
transmit and receive FIFOs will need to be cleared. If DMA servicing is being used the pointers
must also be reinitialized. It should be noted that a collision should never occur after the BOF flag
in a well designed system, since the system slot time will likely be less than the preamble length.
The occurrence of such a situation is normally due to a station on the link that is not adhering to
proper CSMA/CD protocol or is not using the same timing s as the rest of the network.
A collision occurring during the preamble or BOF flag is the normal type of collision that is