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Programming the GPIB-COM Section Five
GPIB-COM User Manual 5-6 © National Instruments Corporation
Bit Mnemonic Description
1r/w THR Transmitter Holding Register Interrupt Enable Bit
This bit enables a transmitter holding register empty interrupt
when set. The transmitter holding register empty interrupt
occurs when the INS8250 becomes ready to send another
character.
This bit functions identically on the GPIB-COM and the
INS8250.
0r/w RDA Received Data Available Interrupt Enable Bit
This bit enables a received data available interrupt when set. The
received data available interrupt occurs when a character is
received from the serial input and stored in the Receive Buffer
Register.
This bit functions identically on the GPIB-COM and the
INS8250.