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Section Five Programming the GPIB-COM
© National Instruments Corporation 5-13 GPIB-COM User Manual
Bit Mnemonic Description
3r FE Framing Error Bit
This bit is set when the received character does not have a valid
stop bit.
On the GPIB-COM, this bit is always clear.
2r PE Parity Error Bit
This bit is set when the received character does not have the
correct parity. It is cleared when the processor reads the Line
Status Register.
On the GPIB-COM, this bit is set when the SRQ* line of the
GPIB is asserted. When the special function selection DIP
switch has been set to disable the SRQ feature, this bit is always
clear.
1r OE Overrun Error Bit
This bit is set when a new character is received and stored in the
Receive Buffer Register before the processor reads the previous
character, thus overwriting and destroying the previous
character. It is cleared when the processor reads the Line Status
Register.
On the GPIB-COM, this bit is always clear.
0r DR Data Ready Bit
This bit is set when a character has been received and stored in
the Receive Buffer Register. It is cleared when the processor
reads the Receive Buffer Register.
This bit functions identically on the GPIB-COM and the
INS8250.