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VXI-MIO Series User Manual I -10
National Instruments Corporation
waveform generation timing
connections, 4-34 to 4-38
UISOURCE signal, 4-37 to 4-38
UPDATE* signal, 4-36 to 4-37
WFTRIG signal, 4-34
timing I/O specifications
VXI-MIO-64E-1, A-7 to A-8
VXI-MIO-64XE-10, A-15
timing signal routing, 3-15 to 3-16
CONVERT* signal routing (figure), 3-15
programmable function inputs, 3-16
timebase, 3-16
VXIbus triggers, 3-17
transfer characteristics
analog input
VXI-MIO-64E-1, A-3
VXI-MIO-64XE-10, A-11
analog output
VXI-MIO-64E-1, A-5 to A-6
VXI-MIO-64XE-10, A-13
TRIG1 signal timing connections, 4-27 to 4-28
input timing (figure), 4-28
output timing (figure), 4-28
TRIG2 signal timing connections, 4-28 to 4-29
input timing (figure), 4-29
output timing (figure), 4-29
triggers
analog, 3-11 to 3-14
above-high-level triggering mode
(figure), 3-13
below-low-level triggering mode
(figure), 3-12
block diagram, 3-12
high-hysteresis triggering
mode, 3-13
inside-region triggering mode
(figure), 3-13
low-hysteresis triggering mode, 3-14
specifications
VXI-MIO-64E-1
analog trigger, A-8
digital trigger, A-8
VXIbus, A-8
VXI-MIO-64XE-10
analog trigger, A-15 to A-16
digital trigger, A-16
VXIbus, A-16
VXIbus triggers, 3-17
troubleshooting.
See
questions about
VXI-MIO series
.
U
UISOURCE signal, 4-37 to 4-38
unipolar input, mixing with bipolar channels
(note), 3-5
unipolar output, 3-10 to 3-11
unpacking VXI-MIO series boards, 1-6
UPDATE* signal timing connections,
4-36 to 4-37
input timing (figure), 4-37
output timing (figure), 4-37
USER/FACTORY configuration
loading, 2-7 to 2-8
protecting/changing factory
configuration, 2-8
V
VirtualBench software, 1-3
voltage output
VXI-MIO-64E-1, A-6
VXI-MIO-64XE-10, A-13
VXIbus logical address, 2-1 to 2-2
selecting (figure), 2-5
VXIbus triggers, 3-17
specifications
VXI-MIO-64E-1, A-8
VXI-MIO-64XE-10, A-16
trigger line utilization (figure), 3-17