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Chapter 2 Overview 2-29
TABLE 2-10 AMC Site 3: AMC.0 Mid-size, AMC.2 Type E1, Master Clock Generator
Support, LED Support
Port Type Connected
0 GB Base (3.0) switch
1 Any Port 1 of AMC #2, usually used for GB
2 Any Port 2 of AMC #2, usually used for SAS/SATA
3 Any Port 2 of AMC #1, usually used for SAS/SATA
4 Not connected
5 Not connected
6 Not connected
7 Not connected
8 Not connected
9 Not connected
10 Not connected
11 Not connected
12 custom LED board support
13 Not connected
14 Not connected
15 Any Update channel, usually used for clock sync
17 Any RTM for future use
18 Any RTM for future use
19 Any RTM for future use
20 Any RTM for future use
TCLK1 CLK IN FPGA and Zarlink
TCLK2 CLK OUT FPGA and Zarlink
TCLK3 CLK IN FPGA and Zarlink
TCLK4 CLK OUT FPGA and Zarlink
FCLK 100MHz 100MHz