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3-12 Copyright © 2001-2003. All rights reserved. ARM DUI 0163B
3.6 GPIO
The interface module provides two connectors for GPIO interfaces. Each connector
provides 32 GPIO lines connected directly to the logic module FPGA. The connectors
are shown in Figure 3-7.
Figure 3-7 GPIO connectors J16 and J17
+5V
GPIOA1
GND
GPIOA4
GPIOA2
+3V3
GPIOA0
GND
GPIOA3
2
50
GND
GPIOA6
GND
GND
GPIOA9
GPIOA12
GND
GPIOA15
GPIOA18
GND
GND
GPIOA21
GND
GPIOA24
GND
GPIOA27
GPIOA7
GPIOA5
GPIOA8
GPIOA10
GPIOA11
GPIOA13
GPIOA14
GPIOA16
GPIOA17
GPIOA19
GPIOA20
GPIOA22
GPIOA23
GPIOA25
GPIOA26
GPIOA28
GPIOA29
GPIOA31
+12V
+5v
GND
GPIOA30
GND
-12V
+3V3
1
49
J17
+5V
GPIOB1
GND
GPIOB4
GPIOB2
+3V3
GPIOB0
GND
GPIOB3
2
50
GND
GPIOB6
GND
GND
GPIOB9
GPIOB12
GND
GPIOB15
GPIOB18
GND
GND
GPIOB21
GND
GPIOB24
GND
GPIOB27
GPIOB7
GPIOB5
GPIOB8
GPIOB10
GPIOB11
GPIOB13
GPIOB14
GPIOB16
GPIOB17
GPIOB19
GPIOB20
GPIOB22
GPIOB23
GPIOB25
GPIOB26
GPIOB28
GPIOB29
GPIOB31
+12V
+5v
GND
GPIOB30
GND
-12V
+3V3
1
49
J16