Arm Enterprises IM-AD1 Network Router User Manual


 
Reference Design Example
4-8 Copyright © 2001-2003. All rights reserved. ARM DUI 0163B
4.2 Example APB register peripheral
Table 4-4 shows the mapping of the logic module registers. The addresses shown are
offsets from the base addresses shown in Figure 4-2 on page 4-5.
Table 4-4 Logic module registers
Offset address Name Type Function
0x0000000
LM_OSC1 Read/write Oscillator 1 divisor register
0x0000004
LM_OSC2 Read/write Oscillator 2 divisor register
0x0000008
LM_LOCK Read/write Oscillator lock register
0x000000C
LM_LEDS Read/write User LEDs control register
0x0000010
LM_INT Read/write Push button interrupt register
0x0000014
LM_SW Read Switches register